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d a t a sh eet product speci?cation supersedes data of april 1993 file under integrated circuits, ic02 1996 aug 23 integrated circuits TDA8702 8-bit video digital-to-analog converter
1996 aug 23 2 philips semiconductors product speci?cation 8-bit video digital-to-analog converter TDA8702 features 8-bit resolution conversion rate up to 30 mhz ttl input levels internal reference voltage generator two complementary analog voltage outputs no deglitching circuit required internal input register low power dissipation internal 75 w output load (connected to the analog supply) very few external components required. applications high-speed digital-to-analog conversion digital tv including: C field progressive scan C line progressive scan subscriber tv decoders satellite tv decoders digital vcrs. general description the TDA8702 is an 8-bit digital-to-analog converter (dac) for video and other applications. it converts the digital input signal into an analog voltage output at a maximum conversion rate of 30 mhz. no external reference voltage is required and all digital inputs are ttl compatible. quick reference data note 1. d0 to d7 connected to v ccd and clk connected to dgnd. 2. the analog output voltages (v out and v out ) are negative with respect to v cca (see table 1). the output resistance between v cca and each of these outputs is typically 75 w . 3. the - 3 db analog output bandwidth is determined by real time analysis of the output transient at a maximum input code transition (code 0 to 255). symbol parameter conditions min. typ. max. unit v cca analog supply voltage 4.5 5.0 5.5 v v ccd digital supply voltage 4.5 5.0 5.5 v i cca analog supply current note 1 - 26 32 ma i ccd digital supply current note 1 - 23 30 ma v out - v out full-scale analog output voltage (peak-to-peak value) note 2 z l =10k w- 1.45 - 1.60 - 1.75 v z l =75k w- 0.72 - 0.80 - 0.88 v ile dc integral linearity error -- 1/2 lsb dle dc differential linearity error -- 1/2 lsb f clk maximum conversion rate -- 30 mhz b - 3 db analog bandwidth f clk = 30 mhz; note 3 - 150 - mhz p tot total power dissipation - 250 340 mw
1996 aug 23 3 philips semiconductors product speci?cation 8-bit video digital-to-analog converter TDA8702 ordering information block diagram type number package name description version TDA8702 dip16 plastic dual in-line package; 16 leads (300 mil); long body sot38-1 TDA8702t so16 plastic small outline package; 16 leads; body width 7.5 mm sot162-1 fig.1 block diagram. handbook, full pagewidth band-gap reference current reference loop current generators current switches registers clock input interface msa659 data input interface 12 11 3 4 10 9 8 7 5 1 2 6 ref 100 nf dgnd agnd clk (lsb) d0 d1 d2 d3 d4 d5 d6 (msb) d7 75 w 75 w 16 15 14 v cca v out v out v ccd TDA8702/ TDA8702t 13
1996 aug 23 4 philips semiconductors product speci?cation 8-bit video digital-to-analog converter TDA8702 pinning symbol pin description ref 1 voltage reference (decoupling) agnd 2 analog ground d2 3 data input; bit 2 d3 4 data input; bit 3 clk 5 clock input dgnd 6 digital ground d7 7 data input; bit 7 d6 8 data input; bit 6 d5 9 data input; bit 5 d4 10 data input; bit 4 d1 11 data input; bit 1 d0 12 data input; bit 0 v ccd 13 positive supply voltage for digital circuits (+5 v) v out 14 analog voltage output v out 15 complementary analog voltage output v cca 16 positive supply voltage for analog circuits (+5 v) fig.2 pin configuration. handbook, halfpage msa658 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 TDA8702/ TDA8702t v cca v out v out v ccd d0 d1 d4 d5 d6 d7 d3 d2 dgnd clk agnd ref
1996 aug 23 5 philips semiconductors product speci?cation 8-bit video digital-to-analog converter TDA8702 limiting values in accordance with the absolute maximum rating system (iec 134). handling inputs and outputs are protected against electrostatic discharges in normal handling. however, to be totally safe, it is desirable to take normal precautions appropriate to handling integrated circuits. thermal resistance symbol parameter min. max. unit v cca analog supply voltage - 0.3 +7.0 v v ccd digital supply voltage - 0.3 +7.0 v v cca - v ccd supply voltage differential - 0.5 +0.5 v agnd - dgnd ground voltage differential - 0.1 +0.1 v v i input voltage (pins 3 to 5 and 7 to 12) - 0.3 v ccd v i out /i out total output current (pins 14 and 15) - 5 +26 ma t stg storage temperature - 55 +150 c t amb operating ambient temperature 0 +70 c t j junction temperature - +125 c symbol parameter value unit r th j-a from junction to ambient in free air sot38-1 70 k/w sot162-1 90 k/w
1996 aug 23 6 philips semiconductors product speci?cation 8-bit video digital-to-analog converter TDA8702 characteristics v cca =v 16 - v 2 = 4.5 v to 5.5 v; v ccd =v 13 - v 6 = 4.5 v to 5.5 v; v cca - v ccd = - 0.5 v to +0.5 v; v ref decoupled to agnd by a 100 nf capacitor; t amb =0 c to +70 c; agnd and dgnd shorted together; unless otherwise speci?ed (typical values measured at v cca =v ccd = 5 v and t amb =25 c). symbol parameter conditions min. typ. max. unit supply v cca analog supply voltage 4.5 5.0 5.5 v v ccd digital supply voltage 4.5 5.0 5.5 v i cca analog supply current note 1 - 26 32 ma i ccd digital supply current note 1 - 23 30 ma agnd - dgnd ground voltage differential - 0.1 - +0.1 v inputs d igital inputs (d7 to d0) and clock input (clk) v il low level input voltage 0 - 0.8 v v ih high level input voltage 2.0 - v ccd v i il low level input current v i = 0.4 v -- 0.3 - 0.4 ma i ih high level input current v i = 2.7 v - 0.01 20 m a f clk maximum clock frequency -- 30 mhz outputs ( note 2 ; referenced to v cca ) v out - v out full-scale analog output voltages (peak-to-peak value) z l =10k w- 1.45 - 1.60 - 1.75 v z l =75 w- 0.72 - 0.80 - 0.88 v v os analog offset output voltage code = 0 -- 3 - 25 mv v out /tc full-scale analog output voltage temperature coef?cient -- 200 m v/k v os /tc analog offset output voltage temperature coef?cient -- 20 m v/k b - 3 db analog bandwidth note 3; f clk = 30 mhz - 150 - mhz g diff differential gain - 0.6 - % f diff differential phase - 1 - deg z o output impedance - 75 -w transfer function (f clk = 30 mhz) ile dc integral linearity error -- 1/2 lsb dle dc differential linearity error -- 1/2 lsb
1996 aug 23 7 philips semiconductors product speci?cation 8-bit video digital-to-analog converter TDA8702 note 1. d0 to d7 are connected to v ccd , clk is connected to dgnd. 2. the analog output voltages (v out and v out are negative with respect to v cca (see table 1). the output resistance between v cca and each of these outputs is 75 w (typ.). 3. the - 3 db analog output bandwidth is determined by real time analysis of the output transient at a maximum input code transition (code 0 to 255). 4. the worst case characteristics are obtained at the transition from input code 0 to 255 and if an external load impedance greater than 75 w is connected between v out or v out and v cca . the specified values have been measured with an active probe between v out and agnd. no further load impedance between v out and agnd has been applied. all input data is latched at the rising edge of the clock. the output voltage remains stable (independent of input data variations) during the high level of the clock (clk = high). during a low-to-high transition of the clock (clk = low), the dac operates in the transparent mode (input data will be directly transferred to their corresponding analog output voltages (see fig.5). 5. the data set-up (t su;dat ) is the minimum period preceding the rising edge of the clock that the input data must be stable in order to be correctly registered. a negative set-up time indicates that the data may be initiated after the rising edge of the clock and still be recognized. the data hold time (t hd;dat ) is the minimum period following the rising edge of the clock that the input data must be stable in order to be correctly registered. a negative hold time indicates that the data may be released prior to the rising edge of the clock and still be recognized. 6. the definition of glitch energy and the measurement set-up are shown in fig.6. the glitch energy is measured at the input transition between code 127 to 128 and on the falling edge of the clock. switching characteristics (f clk = 30 mhz); notes 4 and 5; see figs 3, 4 and 5 t su;dat data set-up time - 0.3 -- ns t hd;dat data hold time 2.0 -- ns t pd propagation delay time -- 1.0 ns t s1 settling time 10% to 90% full-scale change to 1 lsb - 1.1 1.5 ns t s2 settling time 10% to 90% full-scale change to 1 lsb - 6.5 8.0 ns t d input to 50% output delay time - 3.0 5.0 ns output transients (glitches; (f clk = 30 mhz); note 6; see fig.6 e g glitch energy from code transition 127 to 128 -- 30 lsb.ns symbol parameter conditions min. typ. max. unit
1996 aug 23 8 philips semiconductors product speci?cation 8-bit video digital-to-analog converter TDA8702 table 1 input coding and output voltages (typical values; referenced to v cca , regardless of the offset voltage) code input data (d7 to d0) dac output voltages z l =10k w z l =75 w v out v out v out v out 0 000 00 00 0 - 1.6 0 - 0.8 1 000 000 01 - 0.006 - 1.594 - 0.003 - 0.797 . ........ 128 100 000 00 - 0.8 - 0.8 - 0.4 - 0.4 . ........ 254 111 111 10 - 1.594 - 0.006 - 0.797 - 0.003 255 111 111 11 - 1.6 0 - 0.8 0 fig.3 data set-up and hold times. the shaded areas indicate when the input data may change and be correctly registered. data input update must be completed withi n 0.3 ns after the first rising edge of the clock (t su;dat is negative; - 0.3 ns). data must be held at least 2 ns after the rising edge (t hd;dat = +2 ns). handbook, full pagewidth hd; dat t input data clk mbc912 su; dat t 3.0 v 1.3 v 0 v 3.0 v 1.3 v 0 v stable
1996 aug 23 9 philips semiconductors product speci?cation 8-bit video digital-to-analog converter TDA8702 fig.4 switching characteristics. handbook, full pagewidth mbc913 clk 1.3 v code 255 1.3 v code 0 input data (example of a full-scale input transition) 10 % 50 % 90 % 1 lsb 1 lsb v cca 1.6 v (code 255) t d s1 t s2 t pd t v out v cca (code 0) fig.5 latched and transparent mode. during the transparent mode (clk = low), any change of input data will be seen at the output. during the latched mode (clk = high), the analog output remains stable regardless of any change at the input. a change of input data during the latched mode will be seen on the falling edge of the clock (beginning of the transparent mode). handbook, full pagewidth mbc914 - 1 transparent mode latched mode 1.3 v clk input codes v out transparent mode latched mode (stable output) beginning of transparent mode analog output voltage
1996 aug 23 10 philips semiconductors product speci?cation 8-bit video digital-to-analog converter TDA8702 fig.6 glitch energy measurement. handbook, full pagewidth msa660 hp8082a hp8082a pulse generator (slave) pulse generator (slave) divider ( 10) f clk/10 (1) f clk/10 (2) d7 msb d6 d5 d4 d3 d2 d1 d0 (lsb) v out v out TDA8702/ TDA8702t f clk pulse generator (master) model eh107 f clk (3) dynamic probe oscillo- scope tek p6201 tek7104 and tek7a26 r = 100 k w c = 3 pf bandwidth = 20 mhz clock 3 1 2 timing diagram code 128 v out code 127 1 lsb time the value of the glitch energy is the sum of the shaded area measured in lsb.ns.
1996 aug 23 11 philips semiconductors product speci?cation 8-bit video digital-to-analog converter TDA8702 internal pin configurations fig.7 reference voltage generator decoupling. handbook, full pagewidth mbc911 - 1 cca v agnd v ref regulation loop output current generators ref fig.8 agnd and dgnd. handbook, halfpage mbc908 agnd dgnd substrate fig.9 d7 to d0 and clk. handbook, halfpage mbc910 cca v agnd d0 to d7, clk
1996 aug 23 12 philips semiconductors product speci?cation 8-bit video digital-to-analog converter TDA8702 fig.10 digital supply. handbook, halfpage mbc907 v ccd dgnd fig.11 analog outputs. handbook, halfpage mbc909 - 1 cca v out v bit n bit n switches and current generators agnd 75 w 75 w v out fig.12 analog supply. handbook, halfpage mbc906 v cca agnd
1996 aug 23 13 philips semiconductors product speci?cation 8-bit video digital-to-analog converter TDA8702 application information additional application information will be supplied upon request (please quote number ftv/8901). fig.13 analog output voltage without external load (v o = - v out ; see table 1, z l =10k w ). (1) this is a recommended value for decoupling pin 1. handbook, halfpage msa661 TDA8702/ TDA8702t v out agnd ref 100 nf (1) v cca v o v out fig.14 analog output voltage with external load (external load z l =75 w to ). (1) this is a recommended value for decoupling pin 1. handbook, full pagewidth msa662 TDA8702/ TDA8702t v out agnd ref 100 nf (1) v cca z l v o z l / () 75 z l
1996 aug 23 14 philips semiconductors product speci?cation 8-bit video digital-to-analog converter TDA8702 fig.15 analog output with agnd as reference. (1) this is a recommended value for decoupling pin 1. handbook, halfpage msa663 TDA8702/ TDA8702 v out agnd ref agnd 100 nf (1) 100 m f 75 w v cca 2 v o fig.16 example of anti-aliasing filter (analog output referenced to agnd). handbook, full pagewidth msa665 39 pf 100 pf 56 pf 390 w 27 pf 12 pf 10 m h 12 m h v o 390 w 100 m f v out (pin 15) or v out (pin 14) TDA8702 [390/(780+75)]
1996 aug 23 15 philips semiconductors product speci?cation 8-bit video digital-to-analog converter TDA8702 fig.17 frequency response for filter shown in fig.16. characteristics order 5; adapted chebyshev. ripple at 0.1 db. f ( - 3 db) = 6.7 mhz. f (notch) = 9.7 mhz and 13.3 mhz. handbook, halfpage 01020 40 0 100 20 msa657 30 40 60 80 f (mhz) a (db) i fig.18 differential mode (improved supply voltage ripple rejection). (1) this is a recommended value for decoupling pin 1. handbook, full pagewidth msa664 TDA8702/ TDA8702t v out v out agnd ref agnd 100 nf (1) 100 m f 100 m f 2 x v (r2/r1) o r2 r1 r1 r2
1996 aug 23 16 philips semiconductors product speci?cation 8-bit video digital-to-analog converter TDA8702 package outlines unit a max. 1 2 b 1 cee m h l references outline version european projection issue date iec jedec eiaj mm inches dimensions (inch dimensions are derived from the original mm dimensions) sot38-1 92-10-02 95-01-19 a min. a max. b max. w m e e 1 1.40 1.14 0.055 0.045 0.53 0.38 0.32 0.23 21.8 21.4 0.86 0.84 6.48 6.20 0.26 0.24 3.9 3.4 0.15 0.13 0.254 2.54 7.62 0.30 8.25 7.80 0.32 0.31 9.5 8.3 0.37 0.33 2.2 0.087 4.7 0.51 3.7 0.15 0.021 0.015 0.013 0.009 0.01 0.10 0.020 0.19 050g09 mo-001ae m h c (e ) 1 m e a l seating plane a 1 w m b 1 e d a 2 z 16 1 9 8 b e pin 1 index 0 5 10 mm scale note 1. plastic or metal protrusions of 0.25 mm maximum per side are not included. (1) (1) d (1) z dip16: plastic dual in-line package; 16 leads (300 mil); long body sot38-1
1996 aug 23 17 philips semiconductors product speci?cation 8-bit video digital-to-analog converter TDA8702 unit a max. a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p q z y w v q references outline version european projection issue date iec jedec eiaj mm inches 2.65 0.30 0.10 2.45 2.25 0.49 0.36 0.32 0.23 10.5 10.1 7.6 7.4 1.27 10.65 10.00 1.1 1.0 0.9 0.4 8 0 o o 0.25 0.1 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 1.1 0.4 sot162-1 8 16 w m b p d detail x z e 9 1 y 0.25 075e03 ms-013aa pin 1 index 0.10 0.012 0.004 0.096 0.089 0.019 0.014 0.013 0.009 0.41 0.40 0.30 0.29 0.050 1.4 0.055 0.419 0.394 0.043 0.039 0.035 0.016 0.01 0.25 0.01 0.004 0.043 0.016 0.01 x q a a 1 a 2 h e l p q e c l v m a (a ) 3 a 0 5 10 mm scale so16: plastic small outline package; 16 leads; body width 7.5 mm sot162-1 95-01-24 97-05-22
1996 aug 23 18 philips semiconductors product speci?cation 8-bit video digital-to-analog converter TDA8702 soldering introduction there is no soldering method that is ideal for all ic packages. wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. however, wave soldering is not always suitable for surface mounted ics, or for printed-circuits with high population densities. in these situations reflow soldering is often used. this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our ic package databook (order code 9398 652 90011). dip s oldering by dipping or by wave the maximum permissible temperature of the solder is 260 c; solder at this temperature must not be in contact with the joint for more than 5 seconds. the total contact time of successive solder waves must not exceed 5 seconds. the device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (t stg max ). if the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. r epairing soldered joints apply a low voltage soldering iron (less than 24 v) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. if the temperature of the soldering iron bit is less than 300 c it may remain in contact for up to 10 seconds. if the bit temperature is between 300 and 400 c, contact may be up to 5 seconds. so r eflow soldering reflow soldering techniques are suitable for all so packages. reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. several techniques exist for reflowing; for example, thermal conduction by heated belt. dwell times vary between 50 and 300 seconds depending on heating method. typical reflow temperatures range from 215 to 250 c. preheating is necessary to dry the paste and evaporate the binding agent. preheating duration: 45 minutes at 45 c. w ave soldering wave soldering techniques can be used for all so packages if the following conditions are observed: a double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. the longitudinal axis of the package footprint must be parallel to the solder flow. the package footprint must incorporate solder thieves at the downstream end. during placement and before soldering, the package must be fixed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. maximum permissible solder temperature is 260 c, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 c within 6 seconds. typical dwell time is 4 seconds at 250 c. a mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. r epairing soldered joints fix the component by first soldering two diagonally- opposite end leads. use only a low voltage soldering iron (less than 24 v) applied to the flat part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 c.
1996 aug 23 19 philips semiconductors product speci?cation 8-bit video digital-to-analog converter TDA8702 definitions life support applications these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips for any damages resulting from such improper use or sale. data sheet status objective speci?cation this data sheet contains target or goal speci?cations for product development. preliminary speci?cation this data sheet contains preliminary data; supplementary data may be published later. product speci?cation this data sheet contains ?nal product speci?cations. limiting values limiting values given are in accordance with the absolute maximum rating system (iec 134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the speci?cation is not implied. exposure to limiting values for extended periods may affect device reliability. application information where application information is given, it is advisory and does not form part of the speci?cation.

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